1. Field of the Invention
The present invention generally relates to a sample preparation tool and methods for using the tool. More particularly, the present invention relates to tools and methods for holding multiple semiconductor wafer samples that are to be stained with treatment chemicals prior to microanalysis, such as scanning electron microscopy, to allow simultaneous sample preparation.
2. Description of the Invention Background
Integrated circuits are typically constructed by depositing a series of individual layers of predetermined materials on a wafer shaped semiconductor substrate, or "wafer". The individual layers of the integrated circuit are in turn produced by a series of manufacturing steps. The performance characteristics of the circuits are dependent upon the ability to consistently produce the layers not only from wafer to wafer, but from circuit to circuit on each wafer. The maintenance of tight manufacturing tolerances requires that strict quality control procedures be in place, including frequent sampling of the wafers for process characterization. Because of the numerous processing steps involved in the production of semiconductor devices, a significant number of samples must be processed as part of a quality control program. The layers of the wafer are characterized by surface morphology, chemical composition and crystal structure to provide detailed information of the quality of the layers and the processes used to produce the layers. It is desirable to analyze the samples as close to real time as possible to allow for an out of control process line to be detected and corrected as soon as possible. Various microanalytic techniques are employed, such as optical, scanning electron (SEM) and transmission electron (TEM) microscopy to determine the morphology of the layers. The characteristic dimensions of the layers are often a few microns or less, which are well within the capabilities of the analytic tools; however, the results of analyses performed on such short length scales can be highly affected by the preparation techniques used on the samples. Variations in the preparation techniques can produce erroneous indications of product quality and process control problems. In addition, the amount of time necessary to prepare the sample significantly increases the time before an out of control process is detected.
One such example of a technique that is afflicted with the aforementioned problems is in the preparation of samples for SEM analysis. In order to perform the SEM analysis, the wafers must be sectioned to form samples and treated with staining chemicals, such as acids. The current practice in the semiconductor industry is to prepare the samples individually by first placing the sample in the staining chemicals using tweezers. After a predetermined period of time, the sample is removed from the staining chemicals using the tweezers and the sample is rinsed to remove excess staining chemicals and then dried. In many SEM preparation techniques, the samples are exposed to multiple staining chemicals to achieve the desired characteristics and the above procedure must be performed for each staining procedure and for every sample. Obviously, this procedure is very time consuming and can also produce scatter in the test results for a given sample lot due to variations in many factors, such as exposure time and the varying strength of staining chemicals. As such, it would be highly desirable to develop an apparatus and a method to stain wafer samples in a cost effective and timely manner that also tends to minimize the sample to sample variation introduced by the staining process to allow more timely and accurate quality control data to be obtained.
The present invention is directed to an apparatus and method for which overcomes, among others, the above-discussed problems so as to provide an apparatus and a method to uniformly stain a sample lot in a timely manner.